[PATCH] D135102: [AArch64] Compare BFI and ORR with left-shifted operand for OR instruction selection.

[Mingming Liu via Phabricator via llvm-commits]

mingmingl marked an inline comment as done.
mingmingl added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:2835
+    //    and    x8, x23, #0x7f
+    //    ubfx   x9, x23, #8, #7
+    //    orr    x23, x8, x9, lsl #7
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dmgreen wrote:
> You say #7 here, but #8 elsewhere, including the test. I think 7 is correct for this example.
Thanks for the good catch!

Fixed it (overlooked the width is 'immr - imms + 1' for UBFX)


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Comment at: llvm/test/CodeGen/AArch64/trunc-to-tbl.ll:238
 
 define void @trunc_v16i64_to_v16i8_in_loop(ptr %A, ptr %dst) {
+; CHECK-LABEL: trunc_v16i64_to_v16i8_in_loop:
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This test case is generated by `utils/update_llc_test_checks.py`; but for some reason, the whitespaces cause more diff than expected.

I'm going to run auto updater in a clean branch, and see if the whitespace diff is expected without this patch.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D135102/new/

https://reviews.llvm.org/D135102