[PATCH] D134423: [AMDGPU] Fix vgpr2sgpr copy to scalar operands of buffer instructions.

Alexander via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 31 17:17:00 PDT 2022


alex-t added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp:913
       Register Reg = Inst->getOperand(0).getReg();
-      if (TRI->isSGPRReg(*MRI, Reg) && !TII->isVALU(*Inst))
-        for (auto &U : MRI->use_instructions(Reg))
+      for (auto &U : MRI->use_instructions(Reg)) {
+        if (TRI->isSGPRReg(*MRI, Reg) && !TII->isVALU(*Inst))
----------------
      if (TRI->isSGPRReg(*MRI, Reg) && !TII->isVALU(*Inst)) {
        for (auto &U : MRI->use_instructions(Reg)) {
          unsigned Opc = U.getOpcode();
          if (MRI->getRegClass(Reg) == &AMDGPU::SGPR_128RegClass &&
              (TII->isMUBUF(Opc) || TII->isMTBUF(Opc))) {
            Info.HasMUBUFSGPR128 = true;
          }
          Users.push_back(&U);
        }
      }


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D134423/new/

https://reviews.llvm.org/D134423



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