[PATCH] D116694: [RISCV] Add strictfp support for compares.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 31 16:53:09 PDT 2022
craig.topper added inline comments.
================
Comment at: llvm/test/CodeGen/RISCV/double-fcmp-strict.ll:205
+; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: call __ledf2 at plt
+; RV64I-NEXT: slti a0, a0, 1
----------------
Jim wrote:
> craig.topper wrote:
> > Jim wrote:
> > > I am not sure that does the exception raise in `__ledf2` ?
> > > In GCC, it use `__unorddf2` to check either operands is NaN before `__ledf2`.
> > I'm not seeing `__unorddf2` when I tried testing https://godbolt.org/z/fb7PWaso4
> https://godbolt.org/z/nWbfh9hjx
> Clang extra appended options `-ffp-exception-behavior=strict -Xclang -fexperimental-strict-floating-point` to enable strict floating-point.
>
> option: -O3 -march=rv64if -mabi=lp64f -g0 -ffp-exception-behavior=strict -Xclang -fexperimental-strict-floating-point
>
> ```
> addi sp, sp, -16
> sd ra, 8(sp) # 8-byte Folded Spill
> call __gtdf2 at plt <<< may raise fp exception
> sgtz a0, a0
> ld ra, 8(sp) # 8-byte Folded Reload
> addi sp, sp, 16
> ret
> ```
>
> option: -O3 -march=rv64ifd -mabi=lp64f -g0 -ffp-exception-behavior=strict -Xclang -fexperimental-strict-floating-point
>
>
> ```
> fmv.d.x ft0, a0
> fmv.d.x ft1, a1
> frflags a1
> flt.d a0, ft1, ft0
> fsflags a1
> feq.d zero, ft1, ft0
> ret
> ```
>
> GCC use `call __unorddf2` to check either operands is NaN.
Sorry I misunderstood which comparison we were talking about and what you thought the bug was.
I agree this looks like a bug. I'm not how to fix. We probably need to introduce control flow in IR before SelectionDAG to branch over the call to `__ledf2`
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D116694/new/
https://reviews.llvm.org/D116694
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