[PATCH] D130784: [AMDGPU] Support LDS spilling
Piotr Sobczak via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 31 02:49:06 PDT 2022
piotr planned changes to this revision.
piotr added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIFrameLowering.cpp:406
+// m0 for LDS spilling if possible.
+void SIFrameLowering::setupLDSSpilling(MachineFunction &MF,
+ MachineBasicBlock &MBB,
----------------
piotr wrote:
> arsenm wrote:
> > Could we do this in a post-RA pass before LiveIntervals is discarded? I was thinking we should copy what SC does and reserve more registers, and try to reallocate them in such a pass. The same place could have smarter management of m0
> Doing it in a separate pass may work, but will need to explore it - need to check if I would have access to everything I need here.
>
> Good point about extensibility - I did not intend to do the smart m0 thing in the first implementation (left a FIXME), but it is true that to do that properly we would need kind of a data flow analysis so a separate pass would make sense in the long run.
Marking as "planned changes" to investigate running this in a post-RA pass.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D130784/new/
https://reviews.llvm.org/D130784
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