[PATCH] D136829: [SDAG] Fix v1i8 -> 1x i32 handling in getCopyToPartsVector

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/dagcombine-v1i8-extractvecelt-crash.ll:41
+  %load = load <1 x i8>, <1 x i8> addrspace(5)* %addr, align 1
+  store <1 x i8> poison, <1 x i8> addrspace(5)* %addr, align 1
+  store <1 x i8> %load, <1 x i8> addrspace(5)* %addr, align 1
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Pierre-vh wrote:
> arsenm wrote:
> > Is this store of poison really doing anything here?
> Both the stores & the loop are needed somehow, removing either makes the bug disappear - I think it simplifies everything away in those cases
I think some IR code motion is happening before that. What you really need is a value with <1 x i8> live across blocks. The final assembly hoisted the load, and only has one of the stores. Can you pre-make those changes for the original IR? The tests in amdgcn.bitcast have a bit more code to ensure we hit this path


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  https://reviews.llvm.org/D136829/new/

https://reviews.llvm.org/D136829