[PATCH] D136663: Handling ADD|SUB U64 decomposed Pseudos not getting lowered to SDWA form

[Yashwant Singh via Phabricator via llvm-commits]

yassingh updated this revision to Diff 471118.
yassingh added a comment.

Only shrink V_ADD_CO_U32_e32 instruction if V_ADDC_CO_U32_e32 is not shrinkable. Hence avoiding introducing redundant copy instruction as suggested by @arsenm and @foad


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136663/new/

https://reviews.llvm.org/D136663

Files:
  llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
  llvm/test/CodeGen/AMDGPU/v_add_u64_pseudo_sdwa.ll
  llvm/test/CodeGen/AMDGPU/v_sub_u64_pseudo_sdwa.ll

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