[PATCH] D136663: Handling ADD|SUB U64 decomposed Pseudos not getting lowered to SDWA form

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp:873
+  if (!TII->canShrink(MISucc, *MRI) &&
+      !TII->getNamedOperand(MI, AMDGPU::OpName::src1)->isReg())
     return;
----------------
yassingh wrote:
> rampitec wrote:
> > This can be inline literal and still useful I suppose.
> Sorry I don't understand, are you suggesting moving this condition to a string literal?
I mean bailing on non-register operand limits the pass. The src1 operand can be inline literal and still convertible to sdwa form.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136663/new/

https://reviews.llvm.org/D136663