[PATCH] D136525: [M68k] Add codegen pattern for atomic load / store

Sheng via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 27 04:18:49 PDT 2022


0x59616e added a comment.

I dig into the libatomic.a, here is part of the result:

  00000000 <__atomic_store_4>:
     0:   206f 0004       moveal %sp@(4),%a0
     4:   20af 0008       movel %sp@(8),%a0@
     8:   4e75            rts

gcc also compiles to the same result:

  $ echo 'void foo(int *x, int y) { __atomic_store_4(x, y, __ATOMIC_SEQ_CST); }' | m68k-linux-gnu-gcc -m68040 -x c - -o - -S -O2
  #NO_APP
  	.file	"<stdin>"
  	.text
  	.align	2
  	.globl	foo
  	.type	foo, @function
  foo:
  	move.l 4(%sp),%a0
  	move.l 8(%sp),(%a0)
  	rts
  	.size	foo, .-foo
  	.ident	"GCC: (Ubuntu 11.3.0-1ubuntu1~22.04) 11.3.0"
  	.section	.note.GNU-stack,"", at progbits

Maybe the normal load / store is sufficient to match the atomic ordering semantic on m68k ?



================
Comment at: llvm/lib/Target/M68k/M68kTargetMachine.cpp:161
 
+void M68kPassConfig::addIRPasses() { addPass(createAtomicExpandPass()); }
+
----------------
RKSimon wrote:
> Also - do we need to add an pipeline.ll test file?
What is pipeline.ll ?


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