[PATCH] D136075: [AArch64]SME2 Multi-vector - Index/Single/Multi Array Vectors LONG INT MLA sources
Caroline via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 27 03:34:01 PDT 2022
CarolineConcatto added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64InstrFormats.td:1389-1394
+
+def uimm2s4range : Operand<i64>, ImmLeaf<i64,
+[{ return Imm >= 0 && Imm <= 12 && ((Imm % 4) == 0); }], UImmS4XForm> {
+ let PrintMethod = "printImmRangeScale<4, 3>";
+ let ParserMatchClass = UImm2s4RangeOperand;
+}
----------------
paulwalker-arm wrote:
> Perhaps better placed after uimm2s2range or uimm1s4range depending on what you prefer to sort on.
Not a problem, I was grouping by multiples, but I guess that works too.
================
Comment at: llvm/lib/Target/AArch64/SMEInstrFormats.td:2177
+ bits<2> Rv;
+ bits<4> i;
+ bits<1> imm;
----------------
paulwalker-arm wrote:
> This is 4 bits but I only see `i{2,1-0}` used to create `Inst`.
'i' size is wrong here in the declaration for
Four ZA quad-vectors of 64-bit elements
and
Two ZA quad-vectors of 64-bit elements
it should be bits<3> i;
However the assignment is correct. bit{10}= ih; and bit{2-1}= il
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D136075/new/
https://reviews.llvm.org/D136075
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