[PATCH] D124192: [AMDGPU] Callee must always spill writelane VGPRs

[Jay Foad via Phabricator via llvm-commits]

foad added a comment.

In D124192#3887770 <https://reviews.llvm.org/D124192#3887770>, @nhaehnle wrote:

> I think that marking this as a TODO here, and then following up with a separate change that does the direct call of `allocateWWMSpill` from register allocation is a decent plan.

Is that something you could do in a separate pass post-RA but pre-VirtRegRewriter, by looking at the VirtRegMap analysis?


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https://reviews.llvm.org/D124192