[PATCH] D124196: [AMDGPU][SILowerSGPRSpills] Spill SGPRs to virtual VGPRs

[Christudasan Devadasan via Phabricator via llvm-commits]

cdevadas added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:1992
+        BuildMI(MBB, MBBI, DL, TII->get(OrSaveExec), Reg).addImm(-1);
+    SaveExec->getOperand(3).setIsDead(); // Mark SCC as dead.
+  }
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Pierre-vh wrote:
> Why does SCC need to be dead? What happens if another instruction right after uses it?
The code here is only to manipulate exec mask and no other instruction depends on the SCC that it produces, and we should mark it dead to avoid unwanted side effects. We don't have an alternate instruction that doesn't clobber SCC.


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  https://reviews.llvm.org/D124196/new/

https://reviews.llvm.org/D124196