[PATCH] D136264: [libunwind][RISCV] Support reading of VLENB CSR register

Tue Oct 25 07:56:39 PDT 2022

kachkov98 added a comment.

In D136264#3881323 <https://reviews.llvm.org/D136264#3881323>, @MaskRay wrote:

> Can you write a test? Run tests with `ninja check-unwind`
>
> Changing `_LIBUNWIND_HIGHEST_DWARF_REGISTER` to such a large integer makes
> `RegisterLocation  savedRegisters[kMaxRegisterNumber + 1];` consume a lot of stack space and harms performance.

Thank you, I didn't noticed that. Fortunately, this register is read-only and we don't need to save it, so in this particular case it looks ok to not change MaxRegisterNumber at all. Looks like NEC's Vector Engine target in libunwind already does the same thing for the UNW_VE_VIXR, UNW_VE_VL registers.

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  https://reviews.llvm.org/D136264/new/

https://reviews.llvm.org/D136264