[PATCH] D136264: [libunwind][RISCV] Support reading of VLENB CSR register

[Sergei Kachkov via Phabricator via llvm-commits]

kachkov98 added a comment.

In D136264#3881329 <https://reviews.llvm.org/D136264#3881329>, @MaskRay wrote:

> Please mention in the summary the official document defining `UNW_RISCV_VLENB`. Why is it so large?

Link to the documentation: https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc - it's already placed before RISC-V registers enum, I've also added it to the commit message and copied DWARF numbers from the table to the enum comment


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