[PATCH] D136678: [AArch64][SVE2] Add the SVE2.1 pext and ptrue predicate-as-counter instructions

Tue Oct 25 06:10:36 PDT 2022

david-arm created this revision.
david-arm added reviewers: sdesmalen, CarolineConcatto, aemerson, paulwalker-arm, kmclaughlin.
Herald added subscribers: hiraditya, kristof.beyls, tschuett.
Herald added a reviewer: efriedma.
Herald added a project: All.
david-arm requested review of this revision.
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This patch adds the assembly/disassembly for the following instructions:

pext (predicate) : Set predicate from predicate-as-counter
ptrue (predicate-as-counter) : Initialise predicate-as-counter to all active

This patch also introduces the predicate-as-counter registers pn8, etc.

The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2022-09

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D136678

Files:
  llvm/lib/Target/AArch64/AArch64RegisterInfo.td
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
  llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
  llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
  llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
  llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
  llvm/lib/Target/AArch64/SVEInstrFormats.td
  llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
  llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-unwind-inline-asm.ll
  llvm/test/CodeGen/AArch64/GlobalISel/regbank-inlineasm.mir
  llvm/test/MC/AArch64/SVE2p1/pext-diagnostics.s
  llvm/test/MC/AArch64/SVE2p1/pext.s
  llvm/test/MC/AArch64/SVE2p1/ptrue-diagnostics.s
  llvm/test/MC/AArch64/SVE2p1/ptrue.s

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