[PATCH] D12425: [AArch64] Lower READCYCLECOUNTER using MRS PMCCTNR_EL0.

[Salvatore Dipietro via Phabricator via llvm-commits]

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Hi @ab,
I was checking this code and I believe that it would be better for the readcyclecounter function to use the CNTVCT_EL0 register (Counter-timer Virtual Count register) instead of the PMCCNTR_EL0 (Performance Monitors Cycle Count Register) because the current one is a PMU register which, depending on PMU configuration, it might always return zeroes and it doesn't guaranteed to always be increased.


Repository:
  rL LLVM

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  https://reviews.llvm.org/D12425/new/

https://reviews.llvm.org/D12425