[PATCH] D136370: [AMDGPU][MC] Correct definition of aliases
Dmitry Preobrazhensky via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 21 04:15:31 PDT 2022
dp marked an inline comment as done.
dp added a comment.
> Did you observe any instructions that assembled when they shouldn't? It looks like only differences in error message from the tests.
The script I used detected some opcodes which are accepted by the assembler, but I'm not sure if they are part of GFX11 ISA:
- buffer_load_lds_* opcodes (AFAIK support of these depends on specific HW features and I cannot verify if GFX1100 has these features);
- aliases for *_nc_* opcodes like v_add_i32, v_add_u16, v_add_u32;
- buffer_wbinvl1 alias.
================
Comment at: llvm/lib/Target/AMDGPU/VOP2Instructions.td:272
(inst ps.Pfl.DstRC:$vdst, ps.Pfl.Src0RC32:$src0,
- ps.Pfl.Src1RC32:$src1)>,
PredicateControl {
----------------
Joe_Nash wrote:
> Shouldn't it be set on inst.AsmVariantName? I believe by luck they are both Default in all uses.
Using `inst` is more logical of course. Thanks!
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https://reviews.llvm.org/D136370/new/
https://reviews.llvm.org/D136370
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