[PATCH] D136264: [libunwind][RISCV] Support reading of VLENB CSR register

[Kito Cheng via Phabricator via llvm-commits]

kito-cheng accepted this revision.
kito-cheng added a comment.

LGTM, just one nit :)



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Comment at: libunwind/src/Registers.hpp:4105
+    reg_t vlenb;
+    asm("csrr %0, 0xC22" : "=r"(vlenb) :);
+    return vlenb;
----------------
nit: `__asm__("csrr %0, 0xC22" : "=r"(vlenb));`


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