[llvm] decb743 - [AArch64] Fix scheduler crash in fusion code.
Eli Friedman via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 20 10:48:05 PDT 2022
Author: Eli Friedman
Date: 2022-10-20T10:47:44-07:00
New Revision: decb743e80df803dfcb32ac8d175f9641af2f21c
URL: https://github.com/llvm/llvm-project/commit/decb743e80df803dfcb32ac8d175f9641af2f21c
DIFF: https://github.com/llvm/llvm-project/commit/decb743e80df803dfcb32ac8d175f9641af2f21c.diff
LOG: [AArch64] Fix scheduler crash in fusion code.
Make sure we don't call getReg() on the first operand of instruction
without knowing that operand is actually a register.
(This codepath isn't enabled for most CPUs; only triggers on certain
CPUs, like Cortex-X1.)
Differential Revision: https://reviews.llvm.org/D136296
Added:
llvm/test/CodeGen/AArch64/misched-fusion-cmp.mir
Modified:
llvm/lib/Target/AArch64/AArch64MacroFusion.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/AArch64MacroFusion.cpp b/llvm/lib/Target/AArch64/AArch64MacroFusion.cpp
index c7657f37d16d..f51c27c62dfb 100644
--- a/llvm/lib/Target/AArch64/AArch64MacroFusion.cpp
+++ b/llvm/lib/Target/AArch64/AArch64MacroFusion.cpp
@@ -30,8 +30,9 @@ static bool isArithmeticBccPair(const MachineInstr *FirstMI,
// If we're in CmpOnly mode, we only fuse arithmetic instructions that
// discard their result.
- if (CmpOnly && !(FirstMI->getOperand(0).getReg() == AArch64::XZR ||
- FirstMI->getOperand(0).getReg() == AArch64::WZR)) {
+ if (CmpOnly && FirstMI->getOperand(0).isReg() &&
+ !(FirstMI->getOperand(0).getReg() == AArch64::XZR ||
+ FirstMI->getOperand(0).getReg() == AArch64::WZR)) {
return false;
}
diff --git a/llvm/test/CodeGen/AArch64/misched-fusion-cmp.mir b/llvm/test/CodeGen/AArch64/misched-fusion-cmp.mir
new file mode 100644
index 000000000000..b0450c5b8c01
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/misched-fusion-cmp.mir
@@ -0,0 +1,29 @@
+# RUN: llc -o /dev/null 2>&1 %s -mtriple aarch64-unknown -mcpu=cortex-x1 -run-pass=machine-scheduler
+# Just ensure this doesn't crash.
+
+---
+name: crash
+tracksRegLiveness: true
+body: |
+ bb.0:
+ successors: %bb.1(0x00000000), %bb.2(0x80000000)
+ liveins: $w0, $x1
+
+ %1:gpr64common = COPY $x1
+ %0:gpr32common = COPY $w0
+ %3:gpr64sp = COPY $xzr
+ INLINEASM &"", 9 /* sideeffect mayload attdialect */, 196622 /* mem:m */, %3
+ %4:gpr32 = ADDSWri %0, 1, 0, implicit-def $nzcv
+ STRWui %4, %1, 0 :: (store (s32))
+ Bcc 3, %bb.2, implicit killed $nzcv
+ B %bb.1
+
+ bb.1:
+ successors:
+
+ ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
+ ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
+
+ bb.2:
+ RET_ReallyLR
+...
More information about the llvm-commits
mailing list