[PATCH] D136326: [AArch64]SME2 Non-contiguous load and store
Caroline via Phabricator via llvm-commits
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Thu Oct 20 02:50:17 PDT 2022
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This patch adds the assembly/disassembly for the following instruction:
Non-constiguous load with stride resgisters:
LD1B (scalar + immediate): Contiguous load of bytes to multiple strided vectors (immediate index).
(scalar + scalar): Contiguous load of bytes to multiple strided vectors (scalar index).
LD1D (scalar + immediate): Contiguous load of doublewords to multiple strided vectors (immediate index).
(scalar + scalar): Contiguous load of doublewords to multiple strided vectors (scalar index).
LD1H (scalar + immediate): Contiguous load of halfwords to multiple strided vectors (immediate index).
(scalar + scalar): Contiguous load of halfwords to multiple strided vectors (scalar index).
LD1W (scalar + immediate): Contiguous load of words to multiple strided vectors (immediate index).
(scalar + scalar): Contiguous load of words to multiple strided vectors (scalar index).
LDNT1B (scalar + immediate): Contiguous load non-temporal of bytes to multiple strided vectors (immediate index).
(scalar + scalar): Contiguous load non-temporal of bytes to multiple strided vectors (scalar index).
LDNT1D (scalar + immediate): Contiguous load non-temporal of doublewords to multiple strided vectors (immediate index).
(scalar + scalar): Contiguous load non-temporal of doublewords to multiple strided vectors (scalar index).
LDNT1H (scalar + immediate): Contiguous load non-temporal of halfwords to multiple strided vectors (immediate index).
(scalar + scalar): Contiguous load non-temporal of halfwords to multiple strided vectors (scalar index).
LDNT1W (scalar + immediate): Contiguous load non-temporal of words to multiple strided vectors (immediate index).
(scalar + scalar): Contiguous load non-temporal of words to multiple strided vectors (scalar index).
Non-constiguous store with stride resgisters:
ST1B (scalar + immediate): Contiguous store of bytes from multiple strided vectors (immediate index).
(scalar + scalar): Contiguous store of bytes from multiple strided vectors (scalar index).
ST1D (scalar + immediate): Contiguous store of doublewords from multiple strided vectors (immediate index).
(scalar + scalar): Contiguous store of doublewords from multiple strided vectors (scalar index).
ST1H (scalar + immediate): Contiguous store of halfwords from multiple strided vectors (immediate index).
(scalar + scalar): Contiguous store of halfwords from multiple strided vectors (scalar index).
ST1W (scalar + immediate): Contiguous store of words from multiple strided vectors (immediate index).
(scalar + scalar): Contiguous store of words from multiple strided vectors (scalar index).
STNT1B (scalar + immediate): Contiguous store non-temporal of bytes from multiple strided vectors (immediate index).
(scalar + scalar): Contiguous store non-temporal of bytes from multiple strided vectors (scalar index).
STNT1D (scalar + immediate): Contiguous store non-temporal of doublewords from multiple strided vectors (immediate index).
(scalar + scalar): Contiguous store non-temporal of doublewords from multiple strided vectors (scalar index).
STNT1H (scalar + immediate): Contiguous store non-temporal of halfwords from multiple strided vectors (immediate index).
(scalar + scalar): Contiguous store non-temporal of halfwords from multiple strided vectors (scalar index).
STNT1W (scalar + immediate): Contiguous store non-temporal of words from multiple strided vectors (immediate index).
(scalar + scalar): Contiguous store non-temporal of words from multiple strided vectors (scalar index).
The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2022-09
This patch also adds a new SVE vector list to represent the stride loads/stores
ZPRVectorListStrided and the sets of 2 and 4 ZA registers:
ZZ_[b|h|w|d]_strided and ZZZZ_[b|h|w|d]_strided
Depends on: D136172 <https://reviews.llvm.org/D136172>
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D136326
Files:
llvm/lib/Target/AArch64/AArch64RegisterInfo.td
llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
llvm/lib/Target/AArch64/SMEInstrFormats.td
llvm/test/MC/AArch64/SME2/add-diagnostics.s
llvm/test/MC/AArch64/SME2/fmla-diagnostics.s
llvm/test/MC/AArch64/SME2/fmls-diagnostics.s
llvm/test/MC/AArch64/SME2/ld1b.s
llvm/test/MC/AArch64/SME2/ld1d.s
llvm/test/MC/AArch64/SME2/ld1h.s
llvm/test/MC/AArch64/SME2/ld1w.s
llvm/test/MC/AArch64/SME2/ldnt1b.s
llvm/test/MC/AArch64/SME2/ldnt1d.s
llvm/test/MC/AArch64/SME2/ldnt1h.s
llvm/test/MC/AArch64/SME2/ldnt1w.s
llvm/test/MC/AArch64/SME2/sqdmulh-diagnostics.s
llvm/test/MC/AArch64/SME2/st1b
llvm/test/MC/AArch64/SME2/st1b.s
llvm/test/MC/AArch64/SME2/st1d.s
llvm/test/MC/AArch64/SME2/st1h.s
llvm/test/MC/AArch64/SME2/st1w.s
llvm/test/MC/AArch64/SME2/stnt1b.s
llvm/test/MC/AArch64/SME2/stnt1d.s
llvm/test/MC/AArch64/SME2/stnt1h.s
llvm/test/MC/AArch64/SME2/stnt1w.s
llvm/test/MC/AArch64/SME2/sub-diagnostics.s
llvm/test/MC/AArch64/SVE/ld2b-diagnostics.s
llvm/test/MC/AArch64/SVE/ld2d-diagnostics.s
llvm/test/MC/AArch64/SVE/ld2h-diagnostics.s
llvm/test/MC/AArch64/SVE/ld2w-diagnostics.s
llvm/test/MC/AArch64/SVE/ld3b-diagnostics.s
llvm/test/MC/AArch64/SVE/ld3d-diagnostics.s
llvm/test/MC/AArch64/SVE/ld3h-diagnostics.s
llvm/test/MC/AArch64/SVE/ld3w-diagnostics.s
llvm/test/MC/AArch64/SVE/ld4b-diagnostics.s
llvm/test/MC/AArch64/SVE/ld4d-diagnostics.s
llvm/test/MC/AArch64/SVE/ld4h-diagnostics.s
llvm/test/MC/AArch64/SVE/ld4w-diagnostics.s
llvm/test/MC/AArch64/SVE/st2b-diagnostics.s
llvm/test/MC/AArch64/SVE/st2d-diagnostics.s
llvm/test/MC/AArch64/SVE/st2h-diagnostics.s
llvm/test/MC/AArch64/SVE/st2w-diagnostics.s
llvm/test/MC/AArch64/SVE/st3b-diagnostics.s
llvm/test/MC/AArch64/SVE/st3d-diagnostics.s
llvm/test/MC/AArch64/SVE/st3h-diagnostics.s
llvm/test/MC/AArch64/SVE/st3w-diagnostics.s
llvm/test/MC/AArch64/SVE/st4b-diagnostics.s
llvm/test/MC/AArch64/SVE/st4d-diagnostics.s
llvm/test/MC/AArch64/SVE/st4h-diagnostics.s
llvm/test/MC/AArch64/SVE/st4w-diagnostics.s
llvm/test/MC/AArch64/SVE2/ext-diagnostics.s
llvm/test/MC/AArch64/SVE2/splice-diagnostics.s
llvm/test/MC/AArch64/SVE2/tbl-diagnostics.s
llvm/test/MC/AArch64/neon-diagnostics.s
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