[PATCH] D136235: [AMDGPU][GISel] Constrain selected operands in selectG_BUILD_VECTOR

[Matt Arsenault via Phabricator via llvm-commits]

arsenm accepted this revision.
arsenm added inline comments.
This revision is now accepted and ready to land.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:692
+                   .addReg(Src0);
+    if (!constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI))
+      return false;
----------------
Should be able to get away with just src0


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136235/new/

https://reviews.llvm.org/D136235