[PATCH] D136051: [CodeGen] Introduce a flag to allow same cycle def-use schedule

[David Penry via Phabricator via llvm-commits]

dpenry added a comment.

In D136051#3865919 <https://reviews.llvm.org/D136051#3865919>, @ssarda wrote:

> I agree that orderDependence() need to be more robust. However, we can't penalize pipeliner scheduling where def-use are in same cycle. I may add a TODO as of now and keep the flag. Once orderDependence() is fixed, we may remove the flag. Does it sound good?

At the moment we *must* penalize pipeliner scheduling in this case in general, because it will sometimes reverse def-use pairs for physical registers.  I suspect that Hexagon was happy with this for so long because there's something in its scheduling model which is just preventing this from happening.    That is not true for other targets. (ARM is where I discovered it.)

In the meanwhile, a TODO explaining what needs to be done and that the flag would need to be removed makes sense.  It also might be good to make the flag name a bit more explicit about what we're assuming here ... "AssumePhysicalDefUseDontReorderWhenModuloScheduled", is probably a bit long, but it highlights the assumption being made.  I'd like to avoid someone down the line saying "look, there's a flag that might improve performance!" without being warned that it might also break correctness.


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