[llvm] bd6bf34 - [MachineCombiner][RISCV] Precommit test for D135264
Anton Afanasyev via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 18 03:06:09 PDT 2022
Author: Anton Sidorenko
Date: 2022-10-18T12:53:07+03:00
New Revision: bd6bf3499f7a53c4b369b132e0b90132bfe83f33
URL: https://github.com/llvm/llvm-project/commit/bd6bf3499f7a53c4b369b132e0b90132bfe83f33
DIFF: https://github.com/llvm/llvm-project/commit/bd6bf3499f7a53c4b369b132e0b90132bfe83f33.diff
LOG: [MachineCombiner][RISCV] Precommit test for D135264
Added:
llvm/test/CodeGen/RISCV/machine-combiner.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/RISCV/machine-combiner.ll b/llvm/test/CodeGen/RISCV/machine-combiner.ll
new file mode 100644
index 000000000000..032a1a090bb7
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/machine-combiner.ll
@@ -0,0 +1,183 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv64 -mattr=+d -verify-machineinstrs -mcpu=sifive-u74 \
+; RUN: -O3 -enable-unsafe-fp-math < %s | FileCheck %s --check-prefixes=CHECK
+
+define double @test_reassoc_fadd1(double %a0, double %a1, double %a2, double %a3) {
+; CHECK-LABEL: test_reassoc_fadd1:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fadd.d ft0, fa0, fa1
+; CHECK-NEXT: fadd.d ft0, ft0, fa2
+; CHECK-NEXT: fadd.d fa0, ft0, fa3
+; CHECK-NEXT: ret
+ %t0 = fadd nsz reassoc double %a0, %a1
+ %t1 = fadd nsz reassoc double %t0, %a2
+ %t2 = fadd nsz reassoc double %t1, %a3
+ ret double %t2
+}
+
+define double @test_reassoc_fadd2(double %a0, double %a1, double %a2, double %a3) {
+; CHECK-LABEL: test_reassoc_fadd2:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fadd.d ft0, fa0, fa1
+; CHECK-NEXT: fadd.d ft0, fa2, ft0
+; CHECK-NEXT: fadd.d fa0, ft0, fa3
+; CHECK-NEXT: ret
+ %t0 = fadd nsz reassoc double %a0, %a1
+ %t1 = fadd nsz reassoc double %a2, %t0
+ %t2 = fadd nsz reassoc double %t1, %a3
+ ret double %t2
+}
+
+define double @test_reassoc_fadd3(double %a0, double %a1, double %a2, double %a3) {
+; CHECK-LABEL: test_reassoc_fadd3:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fadd.d ft0, fa0, fa1
+; CHECK-NEXT: fadd.d ft0, ft0, fa2
+; CHECK-NEXT: fadd.d fa0, fa3, ft0
+; CHECK-NEXT: ret
+ %t0 = fadd nsz reassoc double %a0, %a1
+ %t1 = fadd nsz reassoc double %t0, %a2
+ %t2 = fadd nsz reassoc double %a3, %t1
+ ret double %t2
+}
+
+define double @test_reassoc_fadd4(double %a0, double %a1, double %a2, double %a3) {
+; CHECK-LABEL: test_reassoc_fadd4:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fadd.d ft0, fa0, fa1
+; CHECK-NEXT: fadd.d ft0, fa2, ft0
+; CHECK-NEXT: fadd.d fa0, fa3, ft0
+; CHECK-NEXT: ret
+ %t0 = fadd nsz reassoc double %a0, %a1
+ %t1 = fadd nsz reassoc double %a2, %t0
+ %t2 = fadd nsz reassoc double %a3, %t1
+ ret double %t2
+}
+
+define double @test_reassoc_fmul1(double %a0, double %a1, double %a2, double %a3) {
+; CHECK-LABEL: test_reassoc_fmul1:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fmul.d ft0, fa0, fa1
+; CHECK-NEXT: fmul.d ft0, ft0, fa2
+; CHECK-NEXT: fmul.d fa0, ft0, fa3
+; CHECK-NEXT: ret
+ %t0 = fmul nsz reassoc double %a0, %a1
+ %t1 = fmul nsz reassoc double %t0, %a2
+ %t2 = fmul nsz reassoc double %t1, %a3
+ ret double %t2
+}
+
+define double @test_reassoc_fmul2(double %a0, double %a1, double %a2, double %a3) {
+; CHECK-LABEL: test_reassoc_fmul2:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fmul.d ft0, fa0, fa1
+; CHECK-NEXT: fmul.d ft0, fa2, ft0
+; CHECK-NEXT: fmul.d fa0, ft0, fa3
+; CHECK-NEXT: ret
+ %t0 = fmul nsz reassoc double %a0, %a1
+ %t1 = fmul nsz reassoc double %a2, %t0
+ %t2 = fmul nsz reassoc double %t1, %a3
+ ret double %t2
+}
+
+define double @test_reassoc_fmul3(double %a0, double %a1, double %a2, double %a3) {
+; CHECK-LABEL: test_reassoc_fmul3:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fmul.d ft0, fa0, fa1
+; CHECK-NEXT: fmul.d ft0, ft0, fa2
+; CHECK-NEXT: fmul.d fa0, fa3, ft0
+; CHECK-NEXT: ret
+ %t0 = fmul nsz reassoc double %a0, %a1
+ %t1 = fmul nsz reassoc double %t0, %a2
+ %t2 = fmul nsz reassoc double %a3, %t1
+ ret double %t2
+}
+
+define double @test_reassoc_fmul4(double %a0, double %a1, double %a2, double %a3) {
+; CHECK-LABEL: test_reassoc_fmul4:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fmul.d ft0, fa0, fa1
+; CHECK-NEXT: fmul.d ft0, fa2, ft0
+; CHECK-NEXT: fmul.d fa0, fa3, ft0
+; CHECK-NEXT: ret
+ %t0 = fmul nsz reassoc double %a0, %a1
+ %t1 = fmul nsz reassoc double %a2, %t0
+ %t2 = fmul nsz reassoc double %a3, %t1
+ ret double %t2
+}
+
+define double @test_reassoc_big1(double %a0, double %a1, double %a2, double %a3, double %a4, double %a5, double %a6) {
+; CHECK-LABEL: test_reassoc_big1:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fadd.d ft0, fa0, fa1
+; CHECK-NEXT: fadd.d ft0, ft0, fa2
+; CHECK-NEXT: fadd.d ft0, ft0, fa3
+; CHECK-NEXT: fadd.d ft0, ft0, fa4
+; CHECK-NEXT: fadd.d ft0, ft0, fa5
+; CHECK-NEXT: fadd.d fa0, ft0, fa6
+; CHECK-NEXT: ret
+ %t0 = fadd nsz reassoc double %a0, %a1
+ %t1 = fadd nsz reassoc double %t0, %a2
+ %t2 = fadd nsz reassoc double %t1, %a3
+ %t3 = fadd nsz reassoc double %t2, %a4
+ %t4 = fadd nsz reassoc double %t3, %a5
+ %t5 = fadd nsz reassoc double %t4, %a6
+ ret double %t5
+}
+
+define double @test_reassoc_big2(double %a0, double %a1, i32 %a2, double %a3, i32 %a4, double %a5) {
+; CHECK-LABEL: test_reassoc_big2:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fcvt.d.w ft0, a0
+; CHECK-NEXT: fmul.d ft0, fa2, ft0
+; CHECK-NEXT: fcvt.d.w ft1, a1
+; CHECK-NEXT: fmul.d ft0, ft1, ft0
+; CHECK-NEXT: fadd.d ft1, fa0, fa1
+; CHECK-NEXT: fmul.d ft0, ft0, fa1
+; CHECK-NEXT: fadd.d ft1, fa2, ft1
+; CHECK-NEXT: fadd.d ft2, fa2, fa1
+; CHECK-NEXT: fmul.d ft0, ft0, fa0
+; CHECK-NEXT: fsub.d ft1, fa3, ft1
+; CHECK-NEXT: fmul.d ft0, ft0, ft2
+; CHECK-NEXT: fmul.d fa0, ft1, ft0
+; CHECK-NEXT: ret
+ %cvt1 = sitofp i32 %a2 to double
+ %cvt2 = sitofp i32 %a4 to double
+ %t5 = fmul nsz reassoc double %a3, %cvt1
+ %t9 = fmul nsz reassoc double %cvt2, %t5
+ %t4 = fmul nsz reassoc double %t9, %a1
+ %t0 = fadd nsz reassoc double %a0, %a1
+ %t1 = fadd nsz reassoc double %a3, %t0
+ %t3 = fadd nsz reassoc double %a3, %a1
+ %t6 = fmul nsz reassoc double %t4, %a0
+ %t2 = fsub nsz reassoc double %a5, %t1
+ %t7 = fmul nsz reassoc double %t6, %t3
+ %t8 = fmul nsz reassoc double %t2, %t7
+ ret double %t8
+}
+
+define double @test_reassoc_fadd_flags_1(double %a0, double %a1, double %a2, double %a3) {
+; CHECK-LABEL: test_reassoc_fadd_flags_1:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fadd.d ft0, fa0, fa1
+; CHECK-NEXT: fadd.d ft0, ft0, fa2
+; CHECK-NEXT: fadd.d fa0, ft0, fa3
+; CHECK-NEXT: ret
+ %t0 = fadd nsz reassoc double %a0, %a1
+ %t1 = fadd double %t0, %a2
+ %t2 = fadd nsz reassoc double %t1, %a3
+ ret double %t2
+}
+
+define double @test_reassoc_fadd_flags_2(double %a0, double %a1, double %a2, double %a3) {
+; CHECK-LABEL: test_reassoc_fadd_flags_2:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fadd.d ft0, fa0, fa1
+; CHECK-NEXT: fadd.d ft0, ft0, fa2
+; CHECK-NEXT: fadd.d fa0, ft0, fa3
+; CHECK-NEXT: ret
+ %t0 = fadd nsz reassoc double %a0, %a1
+ %t1 = fadd nsz reassoc double %t0, %a2
+ %t2 = fadd double %t1, %a3
+ ret double %t2
+}
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