[PATCH] D136046: [X86] `DAGTypeLegalizer::ModifyToType()`: when widening w/ zeros, insert into undef and `and`-mask the padding away

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri created this revision.
lebedev.ri added reviewers: RKSimon, craig.topper, pengfei.
lebedev.ri added a project: LLVM.
Herald added subscribers: StephenFan, hiraditya.
Herald added a project: All.
lebedev.ri requested review of this revision.

We can expect that the sequence of inserting-of-extracts-into-undef
will be successfully lowered back into widening of the source vector,
but it seems that at least for X86 mask vectors, we have a really hard time
recovering from inserting-into-zero.

I've looked into alternative fix injection points, and they are much more involved,
by the time of `LowerBUILD_VECTORvXi1()`/`LowerINSERT_VECTOR_ELT()` the constants might be obscured,
so it does not seem like we can easily deal with this by lowering into bit math later on,
some other pieces are missing.

Instead, it seems like just clearing the padding away via an `AND`-mask
is at least not a worse choice. Why create a problem where there wasn't one.
Though yes, it is possible that there are cases where constants originate
from the source IR, so some other fix may still be needed.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D136046

Files:
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  llvm/test/CodeGen/X86/masked_gather_scatter.ll
  llvm/test/CodeGen/X86/masked_store.ll
  llvm/test/CodeGen/X86/pr45563-2.ll
  llvm/test/CodeGen/X86/pr45833.ll

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