[PATCH] D136032: [X86][2/2] Adding atomic add/sub/or/xor/and lowering into RAO-INT instructions

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:31802
+  // TODO: We can manually widen i8/i16 to i32 to use RAO-INT instruction iff
+  // they are aglined to 32 bits.
+  if (Subtarget.hasRAOINT() &&
----------------
aligned*


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136032/new/

https://reviews.llvm.org/D136032