[PATCH] D136015: [InstCombine] Fold series of instructions into mull

[chenglin.bi via Phabricator via llvm-commits]

bcl5980 resigned from this revision.
bcl5980 added a comment.

In D136015#3860475 <https://reviews.llvm.org/D136015#3860475>, @Allen wrote:

> Thanks for your attention, I do this as there is case  https://godbolt.org/z/x5jMhqW8s is our benchmark,
> and the source is equel to an mull operater for two 64bits integer vaules, so it should be fold to similar assemble.
> This is the 1st step try to generate the **mul**. so now I only enable it with `i64` as the instruction **umulh**.
>
>   mul   x8,x0,x1
>   umulh x9,x0,x1
>   str   x8,[x2]
>   str   x9,[x3]

Maybe you can do it in AArch64 SDAG if you are only interested in AArch64.
I think the detect pattern is too long in instcombine so I have a little worry about the change.
But I'm not senior enough to review the patch, so I will resign as reviewer.


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https://reviews.llvm.org/D136015