[PATCH] D124325: [WIP][AArch64][SVE] Support logical operation BIC with DestructiveBinary patterns

Allen zhong via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Oct 15 08:11:55 PDT 2022


Allen added a comment.

In D124325#3485956 <https://reviews.llvm.org/D124325#3485956>, @efriedma wrote:

> In D124325#3484543 <https://reviews.llvm.org/D124325#3484543>, @paulwalker-arm wrote:
>
>> In D124325#3481275 <https://reviews.llvm.org/D124325#3481275>, @efriedma wrote:
>>
>>>> I don't like the idea of having instruction specific handling within the expand code
>>>
>>> Would this really be so terrible?  I mean, it's arguably a bit of a hack, but it's not that different from the way we handle other pseudo-instructions.
>>
>> I think so.  Pseudo-instruction expansion is often instruction specific but for the movprfx handling we've detached the logic from the instructions (because there's 100s of them) and instead split them across various categories.  So I'd much rather see problems solved for a whole category rather than partially for a single instruction within a category.
>
> I see what you mean.  And I guess some of the instructions don't have any sort of "identity" result like this.
>
> I guess you could use an alternative sequence.  I can't come up with a two-instruction sequence, but I guess you can movprfx a dummy instruction, like `movprfx z0.b, p0/z, z0.b; add z0.b, z0.b, #0; bic z0.b, p0/m, z0.b, z0.b`.

As D88595 <https://reviews.llvm.org/D88595> will not be accepted in a short time, so I'll try with your idea.
Before doing so, I want to check your suggestion: 
do you mean the additonal **add z0.b, z0.b, #0;** should match the above **movprfx** instuction(meet the constraints of movprfx instruction), then the bic instruction will get "identity" result?


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