[PATCH] D136021: [LoongArch] Fix atomicrmw nand instruction generate

[Lin Runze via Phabricator via llvm-commits]

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Fixed atomicrmw nand ir-instruction generate


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D136021

Files:
  llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp
  llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw.ll


Index: llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw.ll
===================================================================
--- llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw.ll
+++ llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw.ll
@@ -450,7 +450,7 @@
 ; LA32-NEXT:    dbar 0
 ; LA32-NEXT:    ll.w $a4, $a2, 0
 ; LA32-NEXT:    and $a5, $a4, $a1
-; LA32-NEXT:    xori $a5, $a5, -1
+; LA32-NEXT:    nor $a5, $a5, $zero
 ; LA32-NEXT:    xor $a5, $a4, $a5
 ; LA32-NEXT:    and $a5, $a5, $a3
 ; LA32-NEXT:    xor $a5, $a4, $a5
@@ -475,7 +475,7 @@
 ; LA64-NEXT:    dbar 0
 ; LA64-NEXT:    ll.w $a4, $a2, 0
 ; LA64-NEXT:    and $a5, $a4, $a1
-; LA64-NEXT:    xori $a5, $a5, -1
+; LA64-NEXT:    nor $a5, $a5, $zero
 ; LA64-NEXT:    xor $a5, $a4, $a5
 ; LA64-NEXT:    and $a5, $a5, $a3
 ; LA64-NEXT:    xor $a5, $a4, $a5
Index: llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp
===================================================================
--- llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp
+++ llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp
@@ -162,9 +162,9 @@
     BuildMI(LoopMBB, DL, TII->get(LoongArch::AND), ScratchReg)
         .addReg(DestReg)
         .addReg(IncrReg);
-    BuildMI(LoopMBB, DL, TII->get(LoongArch::XORI), ScratchReg)
+    BuildMI(LoopMBB, DL, TII->get(LoongArch::NOR), ScratchReg)
         .addReg(ScratchReg)
-        .addImm(-1);
+        .addReg(LoongArch::R0);
     break;
   case AtomicRMWInst::Add:
     BuildMI(LoopMBB, DL, TII->get(LoongArch::ADD_W), ScratchReg)
@@ -268,9 +268,9 @@
     BuildMI(LoopMBB, DL, TII->get(LoongArch::AND), ScratchReg)
         .addReg(DestReg)
         .addReg(IncrReg);
-    BuildMI(LoopMBB, DL, TII->get(LoongArch::XORI), ScratchReg)
+    BuildMI(LoopMBB, DL, TII->get(LoongArch::NOR), ScratchReg)
         .addReg(ScratchReg)
-        .addImm(-1);
+        .addReg(LoongArch::R0);
     // TODO: support other AtomicRMWInst.
   }
 


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