[PATCH] D135869: [AMDGPU][DAG] Only apply trunc/shift combine to 16 bit types

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 14 09:19:22 PDT 2022


arsenm added a comment.

The checks are that the shift doesn't cross the 32-bit boundary. Here is the broken case:  https://alive2.llvm.org/ce/z/P6iBze

The shift amount check seems to be wrong. I think the correct condition is ShiftAmt <= (32 - VT.getScalarSizeInBits()) https://alive2.llvm.org/ce/z/uYZ9tq

I'm not sure alive2 still has the abstract condition checks anymore like the old version


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D135869/new/

https://reviews.llvm.org/D135869



More information about the llvm-commits mailing list