[PATCH] D135952: [AArch64]Change printVectorList to print SVE vector range

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/sve-intrinsics-ldN-sret-reg+imm-addr-mode.ll:459
 ; CHECK-NEXT:    addvl x8, x0, #8
-; CHECK-NEXT:    ld4h { z0.h, z1.h, z2.h, z3.h }, p0/z, [x8]
+; CHECK-NEXT:    ld4h { z0.h-z3.h }, p0/z, [x8]
 ; CHECK-NEXT:    ret
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it would be nice to have a space here, e.g. `{ z0.h - z3.h }`.


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Comment at: llvm/test/CodeGen/AArch64/sve-intrinsics-ldN-sret-reg+reg-addr-mode.ll:9
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    ld2b { z0.b, z1.b }, p0/z, [x0, x1]
+; CHECK-NEXT:    ld2b { z0.b-z1.b }, p0/z, [x0, x1]
 ; CHECK-NEXT:    ret
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Hi @CarolineConcatto, the vector-lists with two vectors should keep using the comma separated form, which is the preferred syntax for vector-lists as described in the Architecture Reference Manual.


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  https://reviews.llvm.org/D135952/new/

https://reviews.llvm.org/D135952