[PATCH] D135137: [AggressiveInstCombine] Load merge the reverse load pattern and mixed load sizes.

[Sanjay Patel via Phabricator via llvm-commits]

spatel added a comment.

This improves the pattern-matching, but it's still not complete, right? Ie, we should have a PhaseOrdering test with all 24 (4!) combinations of four i8-loads spliced into a 32-bit value, so we know the pattern is matched no matter what order the values are put back together with 'or'. We can probably rely on instcombine to canonicalize half of those patterns, but I'm not sure there's anything else there to reduce the matching space.

  define i32 @loadCombine_4consecutive_1234(ptr %p) {
    %p1 = getelementptr i8, ptr %p, i32 1
    %p2 = getelementptr i8, ptr %p, i32 2
    %p3 = getelementptr i8, ptr %p, i32 3
    %l1 = load i8, ptr %p
    %l2 = load i8, ptr %p1
    %l3 = load i8, ptr %p2
    %l4 = load i8, ptr %p3
  
    %e1 = zext i8 %l1 to i32
    %e2 = zext i8 %l2 to i32
    %e3 = zext i8 %l3 to i32
    %e4 = zext i8 %l4 to i32
  
    %s2 = shl i32 %e2, 8
    %s3 = shl i32 %e3, 16
    %s4 = shl i32 %e4, 24
  
    %o1 = or i32 %e1, %s2
    %o2 = or i32 %o1, %s3
    %o3 = or i32 %o2, %s4
    ret i32 %o3
  }
  
  define i32 @loadCombine_4consecutive_1243(ptr %p) {
    %p1 = getelementptr i8, ptr %p, i32 1
    %p2 = getelementptr i8, ptr %p, i32 2
    %p3 = getelementptr i8, ptr %p, i32 3
    %l1 = load i8, ptr %p
    %l2 = load i8, ptr %p1
    %l3 = load i8, ptr %p2
    %l4 = load i8, ptr %p3
  
    %e1 = zext i8 %l1 to i32
    %e2 = zext i8 %l2 to i32
    %e3 = zext i8 %l3 to i32
    %e4 = zext i8 %l4 to i32
  
    %s2 = shl i32 %e2, 8
    %s3 = shl i32 %e3, 16
    %s4 = shl i32 %e4, 24
  
    %o1 = or i32 %e1, %s2
    %o2 = or i32 %o1, %s4
    %o3 = or i32 %o2, %s3
    ret i32 %o3
  }
  
  define i32 @loadCombine_4consecutive_1324(ptr %p) {
    %p1 = getelementptr i8, ptr %p, i32 1
    %p2 = getelementptr i8, ptr %p, i32 2
    %p3 = getelementptr i8, ptr %p, i32 3
    %l1 = load i8, ptr %p
    %l2 = load i8, ptr %p1
    %l3 = load i8, ptr %p2
    %l4 = load i8, ptr %p3
  
    %e1 = zext i8 %l1 to i32
    %e2 = zext i8 %l2 to i32
    %e3 = zext i8 %l3 to i32
    %e4 = zext i8 %l4 to i32
  
    %s2 = shl i32 %e2, 8
    %s3 = shl i32 %e3, 16
    %s4 = shl i32 %e4, 24
  
    %o1 = or i32 %e1, %s3
    %o2 = or i32 %o1, %s2
    %o3 = or i32 %o2, %s4
    ret i32 %o3
  }
  
  define i32 @loadCombine_4consecutive_1342(ptr %p) {
  
  ...


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  https://reviews.llvm.org/D135137/new/

https://reviews.llvm.org/D135137