[PATCH] D135428: [NVPTX] Support neg{.ftz} for f16 and f16x2

[Jakub Chlanda via Phabricator via llvm-commits]

jchlanda added a comment.

In D135428#3850180 <https://reviews.llvm.org/D135428#3850180>, @tra wrote:

> In D135428#3848687 <https://reviews.llvm.org/D135428#3848687>, @jchlanda wrote:
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>> In all honesty I don't know what the motivation for this was, it came to my attention as a DPC++ bug (https://github.com/intel/llvm/issues/6958). I do think that your point about flushing behavior is important and should be preserved.
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>> FWIW, using `neg`directly does not require a bitcast from `Float16x2Regs` to `Int32Regs` or `Float16Regs` to `Int16Regs`, as seen in the `xor` case.
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> Such bitcasts are essentially no-ops once ptxas is done with them. PTX ends up being a bit more verbose, but it usually has no impact on the SASS. FP and integers are kept in the same registers on the actual hardware. I've commented on the original bug.
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> Anyways, I think this change is fine. I just wanted to make sure I'm not missing something.

Thank you for explaining and commenting on the github issue, I had a feeling that those extra moves would be swizzled into nothing when generating sass.
Would you be so kind and land this patch for me?


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https://reviews.llvm.org/D135428