[PATCH] D135428: [NVPTX] Support neg{.ftz} for f16 and f16x2

[Artem Belevich via Phabricator via llvm-commits]

tra added a comment.

In D135428#3848687 <https://reviews.llvm.org/D135428#3848687>, @jchlanda wrote:

> 



> In all honesty I don't know what the motivation for this was, it came to my attention as a DPC++ bug (https://github.com/intel/llvm/issues/6958). I do think that your point about flushing behavior is important and should be preserved.



> FWIW, using `neg`directly does not require a bitcast from `Float16x2Regs` to `Int32Regs` or `Float16Regs` to `Int16Regs`, as seen in the `xor` case.

Such bitcasts are essentially no-ops once ptxas is done with them. PTX ends up being a bit more verbose, but it usually has no impact on the SASS. FP and integers are kept in the same registers on the actual hardware. I've commented on the original bug.

Anyways, I think this change is fine. I just wanted to make sure I'm not missing something.


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  https://reviews.llvm.org/D135428/new/

https://reviews.llvm.org/D135428