[PATCH] D135807: [WIP][RISCV][InsertVSETVLI] Allow promotion of TA to TU and MA to MU
Philip Reames via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 12 12:34:17 PDT 2022
reames added inline comments.
================
Comment at: llvm/test/CodeGen/RISCV/fold-vector-cmp.ll:16
; CHECK-V-NEXT: lui a1, 524288
-; CHECK-V-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
+; CHECK-V-NEXT: vsetivli zero, 2, e32, mf2, tu, ma
; CHECK-V-NEXT: vmv.v.x v8, a1
----------------
FYI, D135794 is somewhat of an alternate patch to this test change. If we land that, this becomes less impactful, and vice versa.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D135807/new/
https://reviews.llvm.org/D135807
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