[PATCH] D135805: [AArch64] Fix potentially incorrect SEH stack allocs for realignments

Martin Storsjö via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 12 12:25:28 PDT 2022


mstorsjo created this revision.
mstorsjo added a reviewer: efriedma.
Herald added subscribers: hiraditya, kristof.beyls.
Herald added a project: All.
mstorsjo requested review of this revision.
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After a07787c9a50c046e45921dd665f5a53a752bbc31 <https://reviews.llvm.org/rGa07787c9a50c046e45921dd665f5a53a752bbc31>, I'm not sure if it
is even possible to trigger this though.

But before possibly removing it later, it would be good to point out
that this previously was wrong - the instruction immediate encoding
for an AND instruction is entirely irrelevant for passing the raw number
of bytes to the SEH unwind opcode.

I guess it's just pure luck that it has happened to work, whenever this
has been tested (if at all).


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D135805

Files:
  llvm/lib/Target/AArch64/AArch64FrameLowering.cpp


Index: llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+++ llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
@@ -1814,7 +1814,7 @@
       if (NeedsWinCFI) {
         HasWinCFI = true;
         BuildMI(MBB, MBBI, DL, TII->get(AArch64::SEH_StackAlloc))
-            .addImm(NumBytes & andMaskEncoded)
+            .addImm(NumBytes)
             .setMIFlag(MachineInstr::FrameSetup);
       }
     }


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