[PATCH] D135693: [WIP][RegisterScavenger][RISCV] Don't search for FrameSetup instrs if we were searching from Non-FrameSetup instrs

luxufan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 12 07:47:10 PDT 2022


StephenFan added a comment.

In D135693#3851758 <https://reviews.llvm.org/D135693#3851758>, @craig.topper wrote:

> In D135693#3851366 <https://reviews.llvm.org/D135693#3851366>, @StephenFan wrote:
>
>> In D135693#3850538 <https://reviews.llvm.org/D135693#3850538>, @craig.topper wrote:
>>
>>> In D135693#3850055 <https://reviews.llvm.org/D135693#3850055>, @craig.topper wrote:
>>>
>>>> If I understand correctly, the use of a vreg in the frame-setup allowed findSurvivorBackward to trigger this code
>>>>
>>>>   // Keep searching when we find a vreg since the spilled register will
>>>>   // be usefull for this other vreg as well later.
>>>>   bool FoundVReg = false;
>>>>   for (const MachineOperand &MO : MI.operands()) {
>>>>     if (MO.isReg() && Register::isVirtualRegister(MO.getReg())) {
>>>>       FoundVReg = true;
>>>>       break;
>>>>     }
>>>>   }
>>>>   if (FoundVReg) {
>>>>     InstrCountDown = InstrLimit;
>>>>     Pos = I;
>>>>   }
>>>>
>>>> which caused the search to stop above the frame-setup. So another option might be to use T1 as the scratch register in frame-setup as was once proposed in an earlier revision of https://reviews.llvm.org/D61884
>>>
>>> But we can't use T1 with shrink wrapping and I've confirmed the same bug exists with shrink wrapping.
>>
>> Thanks for looking into shrink-wrapping! Do you mind sharing your shrink-wrapping test cases? So that I can pick them as CodeGen/RISCV test cases.
>
> This was my shrink wrap case
>
>   @var = external global i32                                                       
>                                                                                    
>   define void @func(i1 %c) {                                                       
>     %space = alloca i32, align 4                                                   
>     %stackspace = alloca[1024 x i32], align 4                                      
>     br i1 %c, label %foo, label %bar                                               
>                                                                                    
>   bar:                                                                             
>                                                                                    
>     ;; Load values to increase register pressure.                                  
>     %v0 = load volatile i32, i32* @var                                             
>     %v1 = load volatile i32, i32* @var                                             
>     %v2 = load volatile i32, i32* @var                                             
>     %v3 = load volatile i32, i32* @var                                             
>     %v4 = load volatile i32, i32* @var                                             
>     %v5 = load volatile i32, i32* @var                                             
>     %v6 = load volatile i32, i32* @var                                             
>     %v7 = load volatile i32, i32* @var                                             
>     %v8 = load volatile i32, i32* @var                                             
>     %v9 = load volatile i32, i32* @var                                             
>     %v10 = load volatile i32, i32* @var                                            
>     %v11 = load volatile i32, i32* @var                                            
>     %v12 = load volatile i32, i32* @var                                            
>     %v13 = load volatile i32, i32* @var                                            
>                                                                                    
>     store volatile i32 %v0, i32* %space                                            
>                                                                                    
>     ;; store values so they are used.                                              
>     store volatile i32 %v0, i32* @var                                              
>     store volatile i32 %v1, i32* @var                                              
>     store volatile i32 %v2, i32* @var                                              
>     store volatile i32 %v3, i32* @var                                              
>     store volatile i32 %v4, i32* @var                                              
>     store volatile i32 %v5, i32* @var                                              
>     store volatile i32 %v6, i32* @var                                              
>     store volatile i32 %v7, i32* @var                                              
>     store volatile i32 %v8, i32* @var                                              
>     store volatile i32 %v9, i32* @var                                              
>     store volatile i32 %v10, i32* @var                                             
>     store volatile i32 %v11, i32* @var                                             
>     store volatile i32 %v12, i32* @var                                             
>     store volatile i32 %v13, i32* @var                                             
>     br label %foo                                                                  
>                                                                                    
>   foo:                                                                             
>     ret void                                                                       
>   }       

Thanks!


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D135693/new/

https://reviews.llvm.org/D135693



More information about the llvm-commits mailing list