[PATCH] D129735: [WIP][RISCV] Add new pass to transform undef to zero-init for vector values.

Roger Ferrer Ibanez via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 11 00:14:37 PDT 2022


rogfer01 added a comment.

At risk of introducing noise: would it make sense to use some pseudo instruction (e.g. `RISCV::PseudoVUNDEF_Mx`) instead of the zero initializations and then drop it later (say when emitting MCInst)?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D129735/new/

https://reviews.llvm.org/D129735



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