[PATCH] D135600: [RISCV] Use branchless form for selects with 0 in either arm

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

In D135600#3847548 <https://reviews.llvm.org/D135600#3847548>, @jrtc27 wrote:

> Is the branchless form better though? Branch+move can be fused but these forms can't and have more instructions to execute.

We need an mtune flag for CPUs that can fuse these like sifive-7-series. But we also need to implement a fusion guarantee too so that code motion doesn't sinks things into the basic block and break fusion. I assume rocket doesn't fuse these?


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