[PATCH] D135541: [TargetLowering][RISCV][X86] Support even divisors in expandDIVREMByConstant.

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon accepted this revision.
RKSimon added a comment.
This revision is now accepted and ready to land.

LGTM



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Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:7175
+// adding the bits that were shifted out of dividend.
+//
 // For division, we can compute the remainder, subtract it from the dividend,
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Might be helpful to mention the even->odd case here as well?


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Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:7256
+                      DAG.getShiftAmountConstant(HBitWidth - TrailingZeros,
+                                                 HiLoVT, dl)));
+      ShiftedLH = DAG.getNode(ISD::SRL, dl, HiLoVT, ShiftedLH,
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craig.topper wrote:
> RKSimon wrote:
> > Would we benefit at all from creating a ISD::FSHL node here?
> We don't use FSHL/FSHR in ExpandShiftByConstant so I think we should be ok. Looks like DAGCombiner is matching it to FSHL for X86.
OK, I have a vague memory of trying to get the legalizers to use funnel-shifts for those cases in the past - I can't remember why though!


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https://reviews.llvm.org/D135541