[PATCH] D134646: [AArch64] Add a target feature for AArch64StorePairSuppress
Allen zhong via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Oct 8 18:52:48 PDT 2022
Allen added a comment.
In D134646#3832896 <https://reviews.llvm.org/D134646#3832896>, @dmgreen wrote:
> OK - I've managed to run the fortran benchmarks on a range of micro-architectures, and only saw the same behaviour as before. The STP being less instructions gives slightly less time for the benchmark overall, and I don't see a reason to keep the store-pair-suppress option for the cpus I tried.
>
> I've changed this to keep the feature for non-Arm cpus. I would be surprised if any of them really benefit from it, but this makes it Arm-only (and cpu=generic).
Thanks for the check. I also recheck the performance and find this change doesn't affect performance in our newest downstream branch, so LGTM for tsv110 now.
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https://reviews.llvm.org/D134646/new/
https://reviews.llvm.org/D134646
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