[PATCH] D134646: [AArch64] Add a target feature for AArch64StorePairSuppress

[Dave Green via Phabricator via llvm-commits]

dmgreen updated this revision to Diff 464934.
dmgreen edited the summary of this revision.
dmgreen added a comment.

OK - I've managed to run the fortran benchmarks on a range of micro-architectures, and only saw the same behaviour as before. The STP being less instructions gives slightly less time for the benchmark overall, and I don't see a reason to keep the store-pair-suppress option for the cpus I tried.

I've changed this to keep the feature for non-Arm cpus. I would be surprised if any of them really benefit from it, but this makes it Arm-only (and cpu=generic).


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D134646/new/

https://reviews.llvm.org/D134646

Files:
  llvm/lib/Target/AArch64/AArch64.td
  llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp
  llvm/test/CodeGen/AArch64/aarch64-a57-fp-load-balancing.ll
  llvm/test/CodeGen/AArch64/argument-blocks-array-of-struct.ll
  llvm/test/CodeGen/AArch64/arm64-windows-calls.ll
  llvm/test/CodeGen/AArch64/ldrpre-ldr-merge.mir
  llvm/test/CodeGen/AArch64/storepairsuppress_minsize.ll

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