[PATCH] D135418: [VP][RISCV] Add vp.smax/smin/umax/umin intrinsics

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 466117.
craig.topper added a comment.

Fix LangRef link.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D135418/new/

https://reviews.llvm.org/D135418

Files:
  llvm/docs/LangRef.rst
  llvm/include/llvm/IR/Intrinsics.td
  llvm/include/llvm/IR/VPIntrinsics.def
  llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmax-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmaxu-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmin-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vminu-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
  llvm/unittests/IR/VPIntrinsicTest.cpp

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