[PATCH] D135418: [VP][RISCV] Add vp.smax/smin/umax/umin intrinsics

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck added inline comments.


================
Comment at: llvm/docs/LangRef.rst:19055
+
+The '``llvm.vp.umin``' intrinsic performs integer unsigned minimum (:ref:`smin <int_smin>`)
+of the first and second vector operand on each enabled lane.  The result on
----------------
This should link to `umin <int_umin>`


================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:175
 
+  case ISD::VP_UMIN:
+  case ISD::VP_UMAX:
----------------
I note that we call `PromoteIntRes_UMINUMAX` for regular UMIN/UMAX. Is there something there that we want to do for the VP versions too?


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https://reviews.llvm.org/D135418