[PATCH] D135324: [AArch64-SVE]: force using SVE in streaming mode to lower arithmetic and logical fixed-width vector ops.
David Sherwood via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 7 01:19:08 PDT 2022
david-arm added a comment.
This looks a lot better now thanks @hassnaa-arm and the test files are much smaller too. I spotted two issues in a couple of tests where we are using illegal NEON instructions, e.g. `bic`. Would you be able to investigate these please?
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Comment at: llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-div.ll:976
+; CHECK-NEXT: ptrue p0.s, vl4
+; CHECK-NEXT: bic v0.4h, #255, lsl #8
+; CHECK-NEXT: bic v1.4h, #255, lsl #8
----------------
This is a NEON vector instruction - this is definitely illegal in streaming mode. Can you try to find out why this is being inserted please?
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Comment at: llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-mulh.ll:1211
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
+; CHECK-NEXT: bic v0.4h, #255, lsl #8
+; CHECK-NEXT: bic v1.4h, #255, lsl #8
----------------
Again, these `bic` instructions are illegal in streaming mode.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D135324/new/
https://reviews.llvm.org/D135324
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