[PATCH] D135396: [RISCV] Use mask/tail agnostic if tied source is IMPLICIT_DEF regardless of the policy operand.
Philip Reames via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 6 15:06:44 PDT 2022
reames added a comment.
LGTM
================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:808
if (!RISCVII::usesMaskPolicy(TSFlags))
MaskAgnostic = true;
----------------
This can now be moved up into the vec policy if clause. (It apparently could before, but it's more clear now.)
================
Comment at: llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundeven-vp.ll:14
; CHECK-NEXT: flh ft0, %lo(.LCPI0_0)(a1)
-; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, mu
+; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
; CHECK-NEXT: vfabs.v v9, v8, v0.t
----------------
Just noting we have same impact here as in https://reviews.llvm.org/D135386#inline-1305623. Non blocking, can keep discussion there for now.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D135396/new/
https://reviews.llvm.org/D135396
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