[PATCH] D135080: [RISCV] Add isel patterns for vfmacc, vfnmacc, vfmsac and vfnmsac.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfnmsac-vp.ll:7
+
+declare <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half>, <vscale x 1 x half>, <vscale x 1 x half>, <vscale x 1 x i1>, i32)
+declare <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half>, <vscale x 1 x i1>, i32)
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These are scalable vector tests in a fixed vector file.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D135080/new/

https://reviews.llvm.org/D135080