[PATCH] D135102: [AArch64] Combine or(and(val,shifted-mask), op) to or(shl(and(srl(val,N), mask), N), op)
Mingming Liu via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 4 09:59:25 PDT 2022
mingmingl planned changes to this revision.
mingmingl added a comment.
Actually the current implementation causes indefinite loop for 'test_nouseful_strb' in 'llvm/test/CodeGen/AArch64/bitfield-insert.ll' (check-llvm hangs at 99%). Will make fixes for that. Sorry about it.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D135102/new/
https://reviews.llvm.org/D135102
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