[PATCH] D134703: [RISCV][ISel] Refactor the formation of VW operations

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

I've reversed the parent/child links so that the patches that need to come first are parents and the later patches are children.



================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:8217
+    SDLoc DL(Root);
+    std::pair<SDValue, SDValue> MaskAndVL = getMaskAndVL(Root);
+    switch (OrigOperand.getOpcode()) {
----------------
I think using `auto [Mask, VL] = getMaskAndVL(Root);` would be consistent with D134442.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:8271
+    default:
+      llvm_unreachable("Unepexted opcode");
+    }
----------------
Unexpected*


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:8291
+    default:
+      llvm_unreachable("Unepexted opcode");
+    }
----------------
Unexpected*


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:8369
+  static bool isSupportedRoot(const SDNode *Root) {
+    if (!Root)
+      return false;
----------------
Would `Root` ever be null?


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:8663
+  assert(NodeExtensionHelper::isSupportedRoot(N) &&
+         "Shouldn't have call this method");
+
----------------
call -> called


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D134703/new/

https://reviews.llvm.org/D134703