[PATCH] D134875: [AArch64] Refactor opcode selection for LowerMUL (NFC)
Florian Hahn via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 30 08:46:45 PDT 2022
fhahn added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:4375
+unsigned static selectUmullSmull(SDNode *&N0, SDNode *&N1, SelectionDAG &DAG,
+ SDLoc DL, bool &isMLA) {
+ bool isN0SExt = isSignExtended(N0, DAG);
----------------
`DL` is also unused in the function, will also fix before committing.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D134875/new/
https://reviews.llvm.org/D134875
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