[PATCH] D134875: [AArch64] Refactor opcode selection for LowerMUL (NFC)

[Florian Hahn via Phabricator via llvm-commits]

fhahn added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:4374
 
+unsigned static selectUmullSmull(SDNode *&N0, SDNode *&N1, SelectionDAG &DAG,
+                                 SDLoc DL, bool &isMLA) {
----------------
this should be `static unsigned`, I'll fix before committing.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:4376
+                                 SDLoc DL, bool &isMLA) {
+  bool isN0SExt = isSignExtended(N0, DAG);
+  bool isN1SExt = isSignExtended(N1, DAG);
----------------
While changing the code, we should also use the opportunity to update the variable names to be in line with the coding standard. Will also update before committing.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D134875/new/

https://reviews.llvm.org/D134875