[PATCH] D109240: GlobalISel: Artifact combine merge-like opcode and unmerge into copy

Petar Avramovic via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 30 03:39:47 PDT 2022


Petar.Avramovic updated this revision to Diff 464210.
Petar.Avramovic added a comment.

> We do need to start moving all of this stuff into ArtifactValueFinder though

Like this?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109240/new/

https://reviews.llvm.org/D109240

Files:
  llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-inserts.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/add.vni16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-build-vector.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-values.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-mul.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-concat-vectors.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctpop.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshl.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshr.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext-inreg.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-vector-args-gfx8-plus.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir



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